Logic Simulation of a Multiprocessor
Name
MIT-LCS-TR-380.pdf
Size
3.15 MB
Format
Adobe PDF
Checksum (MD5)
5c56357f1c9bd88725f9748019c42bfd
Author(s)
Bradley, Elizabeth
Date Issued
October 1986
Series/Report no.
MIT-LCS-TR-380
Abstract
The performance of circuit simulators running on SISD computers is fundamentally limited by the Von Neumann bottleneck. Multiprocessors do not share this limitation. The task of solving the equations for the many parallel signal paths found in most circuits lends itself readily to concurrent computation. for both of these reasons, parallel processing is a highly promising approach to circuit simulation. This thesis explores several facets of this problem.
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