Code compaction and parallelization for VLIW/DSP chip architectures
Name
43556637-MIT.pdf
Description
Full printable version
Size
3.22 MB
Format
Adobe PDF
Checksum (MD5)
34965545e7047419f12de7d2d0217431
Author(s)
Petrov, Tsvetomir P. (Tsvetomir Petrov), 1974-
Advisor(s)
Saman P. Amarasinghe.
Alternative Title
Code compaction and parallelization for very long instruction word/discrete signal processing chip architectures
Date Issued
1999
Publisher
Massachusetts Institute of Technology
Description
Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.
Includes bibliographical references (p. 70-72).
Subjects
Electrical Engineering and Computer Science
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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