On-wafer seamless integration of GaN and Si (100) electronics
Name
Chung-2009-On-wafer seamless integration of GaN and Si (100) electronics.pdf
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687.61 KB
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Adobe PDF
Checksum (MD5)
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Author(s)
Chung, Jinwook
Lu, Bin
Palacios, Tomas
Date Issued
November 2009
Journal
Annual IEEE Compound Semiconductor Integrated Circuit Symposium, 2009. CISC 2009.
Publisher
Institute of Electrical and Electronics Engineers
Citation
Jin Wook Chung, Bin Lu, and T. Palacios. “On-Wafer Seamless Integration of GaN and Si (100) Electronics.” Compound Semiconductor Integrated Circuit Symposium, 2009. CISC 2009. Annual IEEE. 2009. 1-4. ©2009 Institute of Electrical and Electronics Engineers.
Version
Final published version
Abstract
The high thermal stability of nitride semiconductors allows for the on-wafer integration of (001)Si CMOS electronics and electronic devices based on these semiconductors. This paper describes the technology developed at MIT to seamlessly integrate GaN and Si transistors in very close proximity (<5 mum). This integration, the first of any III-V field effect transistor with (001) Si electronics, enables tremendous new possibilities to circuit and system designers. For example, we will study the use of hybrid GaN-Si circuits to improve the power distribution networks in Si microprocessors.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Microsystems Technology Laboratories
Terms of Use
Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Persistent DSpace Link
DOI of Published Version
http://dx.doi.org/10.1109/csics.2009.5315780
