Leveraging Hardware Caches for Memoization
Name
2018.mcache.cal.pdf
Description
Accepted version
Size
312.68 KB
Format
Adobe PDF
Checksum (MD5)
a395b7a4bba35a1489111868c3f95576
Author(s)
Zhang, Guowei
Sanchez, Daniel
Date Issued
October 2017
Journal
IEEE Computer Architecture Letters
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Zhang, Guowei and Daniel Sanchez. "Leveraging Hardware Caches for Memoization." IEEE Computer Architecture Letters 17, 1 (January 2018): 59-63 © 2017 IEEE
Version
Author's final manuscript
Abstract
Memoization improves performance and saves energy by caching and reusing the outputs of repetitive computations. Prior work has proposed software and hardware memoization techniques, but both have significant drawbacks. Software memoization suffers from high runtime overheads, and is thus limited to long computations. Conventional hardware memoization techniques achieve low overheads and can memoize short functions, but they rely on large, special-purpose memoization caches that waste significant area and energy. We propose MCACHE, a hardware technique that leverages data caches for memoization. MCACHE stores memoization tables in memory, and allows them to share cache capacity with normal program data. MCACHE introduces ISA and pipeline extensions to accelerate memoization operations, bridging the gap between software and conventional hardware techniques. Simulation results show that MCACHE improves performance by up to 21 ×, outperforms software memoization by up to 2.2 ×, and achieves similar or superior performance over conventional hardware techniques without any dedicated storage.
MIT Department
Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1109/lca.2017.2762308
