S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance
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submission.pdf
Size
8.53 MB
Format
Adobe PDF
Checksum (MD5)
61e8f35e82a1014240f361e460a5e833
Author(s)
Jeong, Taehoon
Chandrakasan, Anantha P
Lee, Hae-Seung
Date Issued
April 2020
Journal
2020 IEEE Custom Integrated Circuits Conference (CICC)
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Jeong, Taehoon et al. "S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance" 2020 IEEE Custom Integrated Circuits Conference (CICC), Boston, MA, USA, Institute of Electrical and Electronics Engineers (IEEE), April 2020
Version
Author's final manuscript
Abstract
This paper presents a neural-network-based SAR ADC power side-channel attack (PSA) method and a 12-bit, 1.25MS/s secure SAR ADC whose current equalizers protect the ADC from PSA. A prototype SAR ADC was fabricated in 65nm CMOS to demonstrate the proposed concepts. Without PSA protection, the proposed PSA method decoded the power supply current waveforms of the prototype ADC into the corresponding A/D converter output bits with >99% bit-wise accuracy except for the LSB. With PSA protection, the prototype ADC demonstrated high resistance to the proposed PSA method, showing significant drop in bit-wise accuracy.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1109/cicc48029.2020.9075919
