Design and simulation for the fabrication of integrated semiconductor optical logic gates
Name
74902217-MIT.pdf
Description
Full printable version
Size
2.26 MB
Format
Adobe PDF
Checksum (MD5)
c5d86ae37c0f0c7bd04d6638be256077
Author(s)
Markina-Khusid, Aleksandra
Advisor(s)
Leslie Kolodziejski.
Date Issued
2006
Publisher
Massachusetts Institute of Technology
Abstract
Development of ultrafast all-optical logic requires accurate and efficient modeling of optical components and interfaces. In this research, we present an all-optical logic unit cell with complete Boolean functionality as a representative circuit for modeling and optimization of monolithically integrated components. Proposed optical logic unit cell is based on an integrated balanced Mach-Zehnder interferometer (MZI) with semiconductor optical amplifiers (SOAs) in each arm and includes straight ridge waveguides, ridge waveguide bends, and multimode interference (MMI) devices. We use beam propagation method (BPM) to model, design and optimize dilute ridge waveguides, MMIs, and asymmetric twin waveguide (ATG) adiabatic taper couplers. We assess device robustness with respect to variations in fabrication, including lateral pattern transfer and etching. Bending losses in curved waveguides are evaluated using complex-frequency leaky mode computations with perfectly matched layer (PML) boundary conditions. Finite difference time domain (FDTD) method with PML is utilized in calculating reflections produced by abrupt interfaces, including a tip of an adiabatic taper coupler.
(cont.) We demonstrate that evaluating reflections based on local effective indices on two sides of the junction offers a simple, accurate, and time-efficient alternative to FDTD. We show a strategy for development of SOAs for linear amplification and phase shifting using the same layered semiconductor structure. Our model of optical pulse propagation in SOA is based on rate equations for carrier density and photon density and using a wavelength-dependent parametric model for gain. We demonstrate a tradeoff between injection current density and device length for both linear and non-linear SOAs.
Description
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, February 2006.
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Includes bibliographical references.
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
Persistent DSpace Link
