10 Gbps TCP/IP streams from the FPGA for High Energy Physics
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Paus_10 gbps.pdf
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818.4 KB
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Author(s)
Lavinia Darlea, Georgiana
Gomez-Ceballos, Guillelmo
Paus, Christoph M. E.
Raginel, Olivier
Veverka, Jan
Bauer, Gerry P
Sumorok, Konstanty C
Date Issued
June 2014
Journal
Journal of Physics: Conference Series
Publisher
IOP Publishing
Citation
Bauer, Gerry, Tomasz Bawej, Ulf Behrens, James Branson, Olivier Chaze, Sergio Cittolin, Jose Antonio Coarasa, et al. “10 Gbps TCP/IP Streams from the FPGA for High Energy Physics.” Journal of Physics: Conference Series 513, no. 1 (June 11, 2014): 012042.
Version
Final published version
Abstract
The DAQ system of the CMS experiment at CERN collects data from more than 600 custom detector Front-End Drivers (FEDs). During 2013 and 2014 the CMS DAQ system will undergo a major upgrade to address the obsolescence of current hardware and the requirements posed by the upgrade of the LHC accelerator and various detector components. For a loss-less data collection from the FEDs a new FPGA based card implementing the TCP/IP protocol suite over 10Gbps Ethernet has been developed. To limit the TCP hardware implementation complexity the DAQ group developed a simplified and unidirectional but RFC 793 compliant version of the TCP protocol. This allows to use a PC with the standard Linux TCP/IP stack as a receiver. We present the challenges and protocol modifications made to TCP in order to simplify its FPGA implementation. We also describe the interaction between the simplified TCP and Linux TCP/IP stack including the performance measurements.
MIT Department
Massachusetts Institute of Technology. Department of Physics
Massachusetts Institute of Technology. Laboratory for Nuclear Science
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Creative Commons Attribution
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DOI of Published Version
https://doi.org/10.1088/1742-6596/513/1/012042
