Self-aligned InGaAs FinFETs with 5-nm fin-width and 5-nm gate-contact separation
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IEDM2017_AV_finalAug3.pdf
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1.39 MB
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Author(s)
Vardi, Alon
Kong, Lisa (Lisa Fanzhen)
Lu, Wenjie
Cai, Xiaowei
Zhao, Xin
Grajal de la Fuente, Jesus
del Alamo, Jesus A
Date Issued
January 2018
Journal
IEEE International Electron Devices Meeting (IEDM)
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Vardi, Alon et al. "Self-aligned InGaAs FinFETs with 5-nm fin-width and 5-nm gate-contact separation." IEEE International Electron Devices Meeting (IEDM), December 2017, San Francisco, CA, USA, Institute of Electrical and Electronics Engineers, January 2018 © 2017 IEEE
Version
Author's final manuscript
Abstract
We demonstrate self-aligned InGaAs FinFETs with fin widths down to 5 nm fabricated through a CMOS compatible front-end process. Precision dry etching of the recess cap results in metal contacts that are about 5 nm away from the intrinsic portion of the fin. The new process has allowed us to fabricate devices with undoped fins and compare them with delta-doped fins. We find that in highly scaled transistors, undoped fin devices show better OFF-state and a tighter VT distribution but similar ON-state characteristics, as compared with δ-doped-fin transistors. 2D Poisson-Schrodinger simulations reveal undoped fins making more effective use of the fin height.
MIT Department
Massachusetts Institute of Technology. Microsystems Technology Laboratories
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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Creative Commons Attribution-Noncommercial-Share Alike
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DOI of Published Version
https://doi.org/10.1109/iedm.2017.8268411
