Analog-to-Digital Converters for Secure and Emerging AIoT Applications
Name
chen-raychen-phd-eecs-2023-thesis.pdf
Description
Thesis PDF
Size
10.28 MB
Format
Adobe PDF
Checksum (MD5)
0678b1b53e6bd9308e2f9c5613f64cf7
Author(s)
Chen, Ruicong
Advisor(s)
Chandrakasan, Anantha P.
Lee, Hae-Seung
Date Issued
June 2023
Publisher
Massachusetts Institute of Technology
Abstract
AI algorithms based on convolutional neural networks (CNNs), coupled with their high computational requirements, have stimulated the development of novel energyefficient hardware. Analog neural networks (ANNs) with in-memory computing (IMC) using resistive random-access memory (RRAM) are promising architectures to reduce latency and increase energy efficiency for IoT devices. However, interface circuitry, including analog-to-digital converters (ADCs) between RRAM and digital components, is becoming the bottleneck of the RRAM-based ANNs. To address this challenge, a direct hybrid encoding for signed expressions (HESE) SAR is proposed to increase the sparsity of ADC output.
In addition to the performance requirements, the security of IoT devices is of paramount importance. An attacker can perform an ADC power side-channel attack (PSA) to expose confidential information by tapping into the power supply of the ADC. This attack exploits the strong correlation between the ADC digital output codes and the ADC power supply using neural networks based PSA. Previous works have implemented current equalizers or noise injections to protect ADCs from PSAs. However, the current equalizer introduces a large area and energy overhead for the ADC, which is not ideal for IoT applications. Additionally, the previous work with noise injection only protects the probing of CDAC supply. To overcome these limitations, two secure ADCs are proposed to improve both energy efficiency and security, making them more suitable for real-world applications.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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