Design of a continuous-time bandpass delta-sigma modulator
Name
880166778-MIT.pdf
Description
Full printable version
Size
9.24 MB
Format
Adobe PDF
Checksum (MD5)
1126955e13ac9712b63affd2d98e7de1
Author(s)
Yang, Xi, Ph. D. Massachusetts Institute of Technology
Advisor(s)
Hae-Seung Lee.
Alternative Title
Design of a CT bandpass delta-sigma modulator /
Date Issued
2014
Publisher
Massachusetts Institute of Technology
Abstract
An 8th-order continuous-time (CT) bandpass delta-sigma modulator has been designed and simulated in a 65 nm CMOS process. This modulator achieves in simulation 25 MHz signal bandwidth at 250 MHz center frequency with a signal-to- noise ratio (SNR) of 75.5 dB. The modulator samples at 1 GS/s while consuming 319 mW. On the system level, the feedback topology secures stability for the 8th-order system, achieving a maximum stable input range of -1.9 dBFS. A 2.5-V/1.2-V dual-supply loop filter with a feed-forward coupling path has been proposed to suppress noise and distortion. On the transistor level, a 5th -order dual-supply feed-forward operational amplifier (op amp) and a 4th-order single-supply feed-forward op amp have been designed to enable high modulator linearity and coefficient accuracy.
Description
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2014.
Cataloged from PDF version of thesis.
Includes bibliographical references (pages 103-105).
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
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