Optical flow switching with time deadlines for high-performance applications
Name
Chan-2009-Optical flow switching with time deadlines for high-performance applications.pdf
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430.35 KB
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Author(s)
Chan, Vincent W. S.
Ganguly, Anurupa R.
Weichenberg, Guy Elli
Date Issued
March 2010
Journal
IEEE Global Telecommunications Conference, 2009. GLOBECOM 2009
Publisher
Institute of Electrical and Electronics Engineers
Citation
Chan, V.W.S., A.R. Ganguly, and G. Weichenberg. “Optical Flow Switching with Time Deadlines for High-Performance Applications.” Global Telecommunications Conference, 2009. GLOBECOM 2009. IEEE. 2009. 1-8. ©2010 Institute of Electrical and Electronics Engineers.
Version
Final published version
Abstract
This paper focuses on the design and analysis of scheduling approaches for Optical Flow Switching (OFS) serving high performance applications with very stringent time deadline constraints. In particular, we attempt to meet setup times only slightly longer than one roundtrip time with networks at moderate to high loading. This paper proposes three possible scheduling mechanisms for OFS connection setup in a WDM network: (i) a simple algorithm, which awards pre-emptive priority to applications requiring time deadline performance; (ii) a multi-path probing mechanism using only coarse average loading information (i.e., no detailed network state information) but without pre-emption; and (iii) a multi-path probing mechanism using periodically updated network state information and without pre-emption. The updating scheme calls for a slow control plane, which refreshes and broadcast network states only periodically on the order of seconds or longer. Our results show that for a low blocking probability, the update interval must be a fraction of the mean service time of transactions. We conclude that this algorithm, a combination of both slow centralized and fast distributed processes, delivers an efficient and scalable control design for a high-speed transport network of the future.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Research Laboratory of Electronics
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Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1109/GLOCOM.2009.5426119
