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  5. Design and analysis of a memory hierarchy for a very high performance multiprocessor configuration

Design and analysis of a memory hierarchy for a very high performance multiprocessor configuration

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Author(s)
Tick, Evan Michael
Advisor(s)
Arvind.
Date Issued
1982
Publisher
Massachusetts Institute of Technology
Description
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1982.
MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERING.
Vita.
Bibliography: p. 204-221.
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission.
http://dspace.mit.edu/handle/1721.1/7582
Persistent DSpace Link
http://hdl.handle.net/1721.1/15753
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