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  4. New AC-DC Power Factor Correction Architecture Suitable for High Frequency Operation

New AC-DC Power Factor Correction Architecture Suitable for High Frequency Operation

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Author(s)
Lim, Seungbum
•
Otten, David M.
•
Perreault, David J.
Date Issued
June 2015
Journal
IEEE Transactions on Power Electronics
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Lim, Seungbum, David Otten, and David Perreault. “New AC-DC Power Factor Correction Architecture Suitable for High Frequency Operation.” IEEE Trans. Power Electron. (2015): 1–1.
Version
Author's final manuscript
Abstract
This paper presents a novel ac-dc power factor correction (PFC) power conversion architecture for single-phase grid interface. The proposed architecture has significant advantages for achieving high efficiency, good power factor, and converter miniaturization, especially in low-to-medium power applications. The architecture enables twice-line-frequency energy to be buffered at high voltage with a large voltage swing, enabling reduction in the energy buffer capacitor size, and elimination of electrolytic capacitors. While this architecture can be beneficial with a variety of converter topologies, it is especially suited for system miniaturization by enabling designs that operate at high frequency (HF, 3 – 30 MHz). Moreover, we introduce circuit implementations that provide efficient operation in this range. The proposed approach is demonstrated for an LED driver converter operating at a (variable) HF switching frequency (3 – 10 MHz) from 120Vac, and supplying a 35Vdc output at up to 30W. The prototype converter achieves high efficiency (92%) and power factor (0.89), and maintains good performance over a wide load range. Owing to architecture and HF operation, the prototype achieves a high ‘box’ power density of 50W/ in3 (‘displacement’ power density of 130W/ in3), with miniaturized inductors, ceramic energy buffer capacitors, and a small-volume EMI filter.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Laboratory for Electromagnetic and Electronic Systems
Massachusetts Institute of Technology. Research Laboratory of Electronics
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
http://creativecommons.org/licenses/by-nc-sa/4.0/
Persistent DSpace Link
http://hdl.handle.net/1721.1/97635
DOI of Published Version
https://doi.org/10.1109/TPEL.2015.2445927
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