A 36 nW, 7 ppm/°C on-Chip Clock Source Platform for Near-Human-Body Temperature Applications
Name
Kamakshi-2016-A 36 nW, 7 ppm_°C on.pdf
Size
3.71 MB
Format
Adobe PDF
Checksum (MD5)
96aefbb2523f40e4dcb95c2e01b346d4
Author(s) • • •
Kamakshi, Divya Akella
Shrivastava, Aatmesh
Duan, Chuhong
Calhoun, Benton H.
Date Issued
May 2016
Journal
Journal of Low Power Electronics and Applications
Publisher
MDPI AG (Basel, Switzerland)
Citation
Kamakshi, Divya Akella, Aatmesh Shrivastava, Chuhong Duan, and Benton H. Calhoun. “A 36 nW, 7 ppm/°C on-Chip Clock Source Platform for Near-Human-Body Temperature Applications.” JLPEA 6, no. 2 (May 16, 2016): 7.
Version
Final published version
Abstract
We propose a fully on-chip clock-source system in which an ultra-low-power diode-based temperature-uncompensated oscillator (OSC[ subscript diode]) serves as the main clock source and frequency locks to a higher-power temperature-compensated oscillator (OSC[subscript cmp]) that is disabled after each locking event to save power. The locking allows the stability of the uncompensated oscillator to stay within the stability bound of the compensated design. This paper demonstrates the functionality of a locking controller that uses a periodic (counter-based) scheme implemented on-chip and a prediction (temperature-drift-based) scheme. The flexible clock source platform is validated in a 130 nm CMOS technology. In the demonstrated system, it achieves an effective average temperature stability of 7 ppm/°C in the human body temperature range from 20 °C to 40 °C with a power consumption of 36 nW at 0.7 V. It achieves a frequency range of 12 kHz to 150 kHz at 0.7 V.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution 4.0 International License
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.3390/jlpea6020007