Certifying a file system using crash hoare logic
Name
cacm (002).pdf
Description
Accepted version
Size
224.3 KB
Format
Adobe PDF
Checksum (MD5)
309bac3c9f054ca56f0a0db5ce0338c1
Author(s)
Chajed, Tej
Chen, Haogang
Chlipala, Adam
Kaashoek, M. Frans
Zeldovich, Nickolai
Ziegler, Daniel Todd
Alternative Title
correctness in the presence of crashes
Date Issued
April 2017
Journal
Communications of the ACM
Publisher
Association for Computing Machinery (ACM)
Citation
Chajed, Tej et al. "Certifying a file system using crash hoare logic: correctness in the presence of crashes." Communications of the ACM 60, 4 (April 2017): 75-84 © 2017 The Authors
Version
Author's final manuscript
Abstract
FSCQ is the frst fle system with a machine-checkable proof that its implementation meets a specifcation, even in the presence of fail-stop crashes. FSCQ provably avoids bugs that have plagued previous fle systems, such as performing disk writes without suffcient barriers or forgetting to zero out directory blocks. If a crash happens at an inopportune time, these bugs can lead to data loss. FSCQ's theorems prove that, under any sequence of crashes followed by reboots, FSCQ will recover its state correctly without losing data. To state FSCQ's theorems, this paper introduces the Crash Hoare logic (CHL), which extends traditional Hoare logic with a crash condition, a recovery procedure, and logical address spaces for specifying disk states at different abstraction levels. CHL also reduces the proof effort for developers through proof automation. Using CHL, we developed, specifed, and proved the correctness of the FSCQ fle system. Although FSCQ's design is relatively simple, experiments with FSCQ as a user-level fle system show that it is suffcient to run Unix applications with usable performance. FSCQ's specifcations and proofs required signifcantly more work than the implementation, but the work was manageable even for a small team of a few researchers.
MIT Department
Massachusetts Institute of Technology. Laboratory for Computer Science
Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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Creative Commons Attribution-Noncommercial-Share Alike
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DOI of Published Version
https://doi.org/10.1145/3051092
