Dynamic Cache Contention Detection in Multi-threaded Applications
Name
Amarasinghe_Dynamic cache.pdf
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862.43 KB
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Author(s)
Zhao, Qin
Koh, David F.
Raza, Syed A.
Amarasinghe, Saman P.
Bruening, Derek
Wong, Weng-Fai
Date Issued
March 2011
Journal
VEE Proceedings (ACM SIGPLAN SIGOPS International Conference on Virtual Execution Environments)
Publisher
Association for Computing Machinery / ACM Special Interest Group on Programming Languages./ ACM Special Interest Group in Operating Systems.
Citation
Zhao, Qin et al. “Dynamic Cache Contention Detection in Multi-threaded Applications.” Proceedings of the 7th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments - VEE ’11. Newport Beach, California, USA, 2011. 27. Copyright
c2011 ACM
Version
Author's final manuscript
Abstract
In today's multi-core systems, cache contention due to true and false sharing can cause unexpected and significant performance degradation. A detailed understanding of a given multi-threaded application's behavior is required to precisely identify such performance bottlenecks. Traditionally, however, such diagnostic information can only be obtained after lengthy simulation of the memory hierarchy.
In this paper, we present a novel approach that efficiently analyzes interactions between threads to determine thread correlation and detect true and false sharing. It is based on the following key insight: although the slowdown caused by cache contention depends on factors including the thread-to-core binding and parameters of the memory hierarchy, the amount of data sharing is primarily a function of the cache line size and application behavior. Using memory shadowing and dynamic instrumentation, we implemented a tool that obtains detailed sharing information between threads without simulating the full complexity of the memory hierarchy. The runtime overhead of our approach --- a 5x slowdown on average relative to native execution --- is significantly less than that of detailed cache simulation. The information collected allows programmers to identify the degree of cache contention in an application, the correlation among its threads, and the sources of significant false sharing. Using our approach, we were able to improve the performance of some applications up to a factor of 12x. For other contention-intensive applications, we were able to shed light on the obstacles that prevent their performance from scaling to many cores.
MIT Department
Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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Creative Commons Attribution-Noncommercial-Share Alike 3.0
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DOI of Published Version
https://doi.org/10.1145/1952682.1952688
