Design/System Technology Co-optimization of Gallium Nitride High Electron Mobility Transistors for Next-G 3DIC Heterogeneous Integration of Gallium Nitride and Si CMOS
Name
yadav-yadavps-sm-eecs-2024-thesis.pdf
Description
Thesis PDF
Size
29.52 MB
Format
Adobe PDF
Checksum (MD5)
2b10e444327cd4ef8cdd5b7754d9a194
Author(s)
Yadav, Pradyot Singh
Advisor(s)
Palacios, Tomás
Date Issued
May 2024
Publisher
Massachusetts Institute of Technology
Abstract
With data rates pushing into the Tbps, there is an urgent need for the use of mmWave and subterahertz RF front ends and transistors. Gallium Nitride (GaN) transistors have continued to push the limits of high-power density, high frequency semiconductor devices. The future of GaN radio frequency (RF) circuit technology is at the intersection of device engineering, advanced packaging, and circuit design. Currently, these are three separate fields with little-to-no communication between them, resulting in critical limitations to today’s technology. These fields need to collaborate, crosspollinate, and intersect in order to modernize and advance innovation for the next generation of RF front ends. To design the most efficient W-G Band devices and systems, we must embrace a design/system-technology co-optimization (DTCO/STCO) approach, that combines innovative GaN transistors with engineered linearity, novel heterogeneous integration with state-of-the-art Silicon (Si) bias and control circuitry, and advanced physics-based modeling. This thesis presents the development of a 3DIC consisting of GaN HEMTs and Si CMOS BEOL, in particular W-band GaN HEMTs, Si CMOS BEOL circuits in Intel16, and advanced packaging of dielets. The full chip continuum is investigated and innovated upon.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
In Copyright - Educational Use Permitted
Copyright retained by author(s)
Persistent DSpace Link
