Broadband lumped-element parameter extraction method of two-port 3D MEMS in-chip solenoid inductors based on a physics-based equivalent circuit model
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micromachines-11-00836.pdf
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Author(s) • • • • • •
Sun, Jiamian
Li, Haiwang
Wu, Sifan
Xu, Tiantong
Li, Hanqing
Wu, Hanxiao
Xia, Shuangzhi
Date Issued
September 2020
Journal
Micromachines
Publisher
Multidisciplinary Digital Publishing Institute
Citation
Sun, Jiamian et al. "Broadband lumped-element parameter extraction method of two-port 3D MEMS in-chip solenoid inductors based on a physics-based equivalent circuit model." Micromachines 11, 9 (September 2020): 836 ©2020 Author(s)
Version
Final published version
Abstract
Integrated 2D spiral inductors possess low inductance per unit area, which limits their application range. However, the state of investigation into the lumped-element parameter extraction method for integrated 3D in-chip multi-turn solenoid inductors, which possess higher inductance per unit area, is inadequate. This type of inductor can thus not be incorporated into fast computer-aided design (CAD)-assisted circuit design. In this study, we propose a broadband two-port physics-based equivalent circuit model for 3D microelectromechanical system (MEMS) in-chip solenoid inductors that are embedded in silicon substrates. The circuit model was composed of lumped elements with specific physical meanings and incorporated complicated parasitics resulting from eddy currents, skin effects, and proximity effects. Based on this model, we presented a lumped-element parameter extraction method using the electronic design automation software package, Agilent Advanced Design System (ADS). This method proved to be consistent with the results of two-port testing at low to self-resonant frequencies and could thus be used in CAD-assisted circuit design. The lumped element value variations were analyzed based on the physical meaning of the elements with respect to variations in structures and the substrate resistivity of inductors. This provided a novel perspective in terms of the design of integrated in-chip solenoid inductors.
MIT Department
Massachusetts Institute of Technology. Microsystems Technology Laboratories
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DOI of Published Version
https://doi.org/10.3390/mi11090836