Two-Layer Error Control Codes Combining Rectangular and Hamming Product Codes for Cache Error
Name
Zhang-2014-Two-layer error cont.pdf
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990.42 KB
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Adobe PDF
Checksum (MD5)
0ffb2746a536263b34887912a11f84bf
Author(s)
Zhang, Meilin
Ampadu, Paul
Date Issued
February 2014
Journal
Journal of Low Power Electronics and Applications
Publisher
MDPI AG
Citation
Zhang, Meilin, and Paul Ampadu. “Two-Layer Error Control Codes Combining Rectangular and Hamming Product Codes for Cache Error.” Journal of Low Power Electronics and Applications 4, no. 1 (February 27, 2014): 44–62.
Version
Final published version
Abstract
We propose a novel two-layer error control code, combining error detection capability of rectangular codes and error correction capability of Hamming product codes in an efficient way, in order to increase cache error resilience for many core systems, while maintaining low power, area and latency overhead. Based on the fact of low latency and overhead of rectangular codes and high error control capability of Hamming product codes, two-layer error control codes employ simple rectangular codes for each cache line to detect cache errors, while loading the extra Hamming product code checks bits in the case of error detection; thus enabling reliable large-scale cache operations. Analysis and experiments are conducted to evaluate the cache fault-tolerant capability of various existing solutions and the proposed approach. The results show that the proposed approach can significantly increase Mean-Error-To-Failure (METF) and Mean-Time-To-failure (MTTF) up to 2.8×, reduce storage overhead by over 57%, and increase instruction per-cycle (IPC) up to 7%, compared to complex four-way 4EC5ED; and it increases METF and MTTF up to 133×, reduces storage overhead by over 11%, and achieves a similar IPC compared to simple eight-way single-error correcting double-error detecting (SECDED). The cost of the proposed approach is no more than 4% external memory access overhead.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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DOI of Published Version
https://doi.org/10.3390/jlpea4010044
