Graph-based representations and coupled verification of VLSI schematics and layouts
Name
23117187-MIT.pdf
Description
Full printable version
Size
13.94 MB
Format
Adobe PDF
Checksum (MD5)
3971e88c05d55a6f69f3c72d70d68b0a
Author(s)
Bamji, Cyrus S
Advisor(s)
Jonathan Allen.
Date Issued
1990
Publisher
Massachusetts Institute of Technology
Description
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1990.
Includes bibliographical references (leaves 193-196).
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
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