Designing manycore processor networks using silicon photonics
Name
Joshi-2009-Designing manycore processor networks using silicon photonics.pdf
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309.3 KB
Format
Adobe PDF
Checksum (MD5)
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Author(s)
Stojanovic, Vladimir Marko
Shamim, Imran
Batten, Christopher
Joshi, Ajay J.
Kwon, Yong-Jin
Beamer, Scott
Asanovic, Krste
Date Issued
December 2009
Journal
LEOS Annual Meeting Conference Proceedings, 2009. LEOS '09. IEEE
Publisher
Institute of Electrical and Electronics Engineers
Citation
Joshi, A. et al. “Designing manycore processor networks using silicon photonics.” LEOS Annual Meeting Conference Proceedings, 2009. LEOS '09. IEEE. 2009. 16-17. ©2009 Institute of Electrical and Electronics Engineers.
Version
Final published version
Abstract
We present a vertical integration approach for designing silicon photonic networks for communication in manycore systems. Using a top-down approach we project the photonic device requirements for a 64-tile system designed in 22 nm technology.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Research Laboratory of Electronics
Terms of Use
Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1109/LEOS.2009.5343493
