ERNI-3D : a technology-generic tool for interconnect reliability projections in 3D integrated circuits
Name
48995407-MIT.pdf
Description
Full printable version
Size
7.86 MB
Format
Adobe PDF
Checksum (MD5)
51c1a0fa1752ed5c70a2c8f0f0826766
Author(s)
Alam, Syed Mohiul, 1975-
Advisor(s)
Donald E. Troxel and Carl V. Thompson.
Alternative Title
Technology-generic tool for interconnect reliability projections in 3D integrated circuits
Date Issued
2001
Publisher
Massachusetts Institute of Technology
Abstract
Recent developments in semiconductor processing technology has enabled the fabrication of a single integrated circuit (IC) with multiple device-interconnect layers or wafers stacked on each other. This approach is commonly referred to as the 3D integration of ICs. Although there has been significant research on the impact of 3D integration on chip size, interconnect delay, and overall system performance, the reliability issues in the 3D interconnect arrays are largely unknown. In this research, a novel Reliability Computer Aided Design (RCAD) tool ERNI-3D has been developed for reliability analysis of interconnects in a 3D IC. Using this tool, circuit designers can get interactive feedback on the reliability of their circuits associated with electromigration, 3D bonding, and joule heating. Based on a joint probability distribution, a full-chip reliability model combines all reliability figures from different components to give a useful number for the designers' reference. This initial version of ERNI-3D treats 3D circuits with two wafers or device-interconnect layers in the stack. However, the data-structures and algorithms in the tool are generic enough to make it compatible with 3D circuits with more than two device-interconnect layers, and to allow incorporation of more sophisticated reliability models in the future. Since 3D integration technology is not yet widespread, and no CAD tool supports IC layouts for such a technology, a novel layout methodology has been implemented in 3DMagic by extending MAGIC, a widely used layout editor in academia. Apart from the CAD tool work, this research has also led to the development of, and interesting experiments with, some 3D circuits for testing ERNI-3D. The test circuits investigated are a 3D 8-bit adder and an FPGA.
Description
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.
Includes bibliographical references (p. 107-112).
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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