The Execution Migration Machine: Directoryless Shared-Memory Architecture
Name
shim_manuscript.pdf
Size
916.64 KB
Format
Adobe PDF
Checksum (MD5)
033fffceb9cf46bad5d13fe18ca2822f
Author(s)
Shim, Keun Sup
Lis, Mieszko
Khan, Omer
Devadas, Srinivas
Date Issued
September 2015
Journal
Computer
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Shim, Keun Sup; Lis, Mieszko; Khan, Omer and Devadas, Srinivas “The Execution Migration Machine: Directoryless Shared-Memory Architecture.” Computer 48, no. 9 (September 2015): 50–59. © 2015 Institute of Electrical and Electronics Engineers (IEEE)
Version
Original manuscript
Abstract
For certain applications involving chip multiprocessors with more than 16 cores, a directoryless architecture with fine-grained and partial-context thread migration can outperform directory-based coherence, providing lighter on-chip traffic and reduced verification complexity.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1109/MC.2015.263
