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  4. Locality-oblivious cache organization leveraging single-cycle multi-hop NoCs

Locality-oblivious cache organization leveraging single-cycle multi-hop NoCs

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Author(s)
Krishna, Tushar
•
Peh, Li-Shiuan
•
Kwon, Woo Cheol
Date Issued
March 2014
Journal
Proceedings of the 19th international conference on Architectural support for programming languages and operating systems (ASPLOS '14)
Publisher
Association for Computing Machinery (ACM)
Citation
Woo-Cheol Kwon, Tushar Krishna, and Li-Shiuan Peh. 2014. Locality-oblivious cache organization leveraging single-cycle multi-hop NoCs. SIGPLAN Not. 49, 4 (February 2014), 715-728.
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Author's final manuscript
Abstract
Locality has always been a critical factor in on-chip data placement on CMPs as accessing further-away caches has in the past been more costly than accessing nearby ones. Substantial research on locality-aware designs have thus focused on keeping a copy of the data private. However, this complicatesthe problem of data tracking and search/invalidation; tracking the state of a line at all on-chip caches at a directory or performing full-chip broadcasts are both non-scalable and extremely expensive solutions. In this paper, we make the case for Locality-Oblivious Cache Organization (LOCO), a CMP cache organization that leverages the on-chip network to create virtual single-cycle paths between distant caches, thus redefining the notion of locality. LOCO is a clustered cache organization, supporting both homogeneous and heterogeneous cluster sizes, and provides near single-cycle accesses to data anywhere within the cluster, just like a private cache. Globally, LOCO dynamically creates a virtual mesh connecting all the clusters, and performs an efficient global data search and migration over this virtual mesh, without having to resort to full-chip broadcasts or perform expensive directory lookups. Trace-driven and full system simulations running SPLASH-2 and PARSEC benchmarks show that LOCO improves application run time by up to 44.5% over baseline private and shared cache.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
http://creativecommons.org/licenses/by-nc-sa/4.0/
Persistent DSpace Link
http://hdl.handle.net/1721.1/90541
DOI of Published Version
https://doi.org/10.1145/2541940.2541976
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