Design of Area-Efficient Integrated Gate Drivers
Name
Murray-ekmurray-meng-eecs-2021-thesis.pdf
Description
Thesis PDF
Size
4.22 MB
Format
Adobe PDF
Checksum (MD5)
bf442faa0b4da408fb3b4be1fd58902f
Author(s)
Murray, Elizabeth K.
Advisor(s)
Perreault, David J.
Lam, Hylas
Date Issued
June 2021
Publisher
Massachusetts Institute of Technology
Abstract
MOSFET gate drivers are important in modern power electronics due to the ubiquity of applications that require the fast and controlled switching of power MOSFETs. A controller serves as the first building block in many such systems, but with limited drive current and logic level voltage signals, it is unable to directly turn on a discrete power MOSFET. Gate drivers serve as the critical interface between the controller output and the power MOSFET.
This thesis explores some of the considerations in designing a gate driver for hardswitching applications and presents a new design for an area-efficient integrated gate driver. Simulation results show that, for a given die area, the new design gives better performance than existing topologies.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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