SquareLoop: Explore Optimal Authentication Block Strategy for ML
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Author(s) • • • • • • •
Strzeszynski, Jan
Tong, Jianming
Lee, Kyungmi
Xiong, Nathan
Parashar, Angshuman
Emer, Joel
Krishna, Tushar
Yan, Mengjia
Date Issued
October 18, 2025
Publisher
ACM|Hardware and Architectural Support for Security and Privacy 2025
Citation
Jan Strzeszynski, Jianming Tong, Kyungmi Lee, Nathan Xiong, Angshuman Parashar, Joel S. Emer, Tushar Krishna, and Mengjia Yan. 2025. SquareLoop: Explore Optimal Authentication Block Strategy for ML. In Proceedings of the 14th International Workshop on Hardware and Architectural Support for Security and Privacy (HASP '25). Association for Computing Machinery, New York, NY, USA, 37–45.
Version
Final published version
Abstract
Off-chip memory in ML accelerators is vulnerable to both hardware
and software attack, which needs encryption and authentication.
Precise performance modeling of it requires (1) representation of
authentication blocks (AuthBlock) to cover the full design space of
shapes and orientations, and (2) precise memory behavior modeling,
as encryption and authentication mainly increase memory traffic.
This paper introduces 𝑆
2Loop, a framework that resolves these
challenges by introducing (1) flexible, all-level partitioning based
AuthBlocks for ensuring full coverage of the entire design space, (2)
a realistic layout-based memory model, and (3) an Mapping-LayoutAuthentication co-search algorithm to explore the drastic combinatorial design space to figure out optimal mapping, layout, and
AuthBlock shape choice for multi-layer workloads. SquareLoop’s
detailed memory model helps find better mapping to achieve 1.32×
speedup on ResNet18 compared to the SotA SecureLoop, and our
latency predictions are validated to within 7.3% of an RTL implementation. 𝑆
2𝐿𝑜𝑜𝑝 also achieve up-to 1.08×/1.82× overall speedup for
authenticated ResNet18/MobileNet-V3 on various accelerators with
AuthBlock and Mapping co-searching. We open-source 𝑆
2Loop to
provide a powerful and validated tool for designing efficient, secure
accelerators at https://github.com/maeri-project/squareloop.
Description
HASP 2025, Seoul, Republic of Korea
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Research Laboratory of Electronics
Massachusetts Institute of Technology. Department of Mathematics
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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Creative Commons Attribution
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DOI of Published Version
https://doi.org/10.1145/3768725.3768732