Leakage and breakdown mechanisms of GaN vertical power FinFETs
Name
_pdf_archive_APPLAB_vol_114_iss_16_163503_1_am.pdf
Description
Accepted version
Size
7.44 MB
Format
Adobe PDF
Checksum (MD5)
6441a88c87a538d607bdb757d5f052bb
Author(s)
Xiao, Ming
Gao, Xiang
Palacios, Tomas
Zhang, Yuhao
Date Issued
April 22, 2019
Journal
Applied Physics Letters
Publisher
AIP Publishing
Citation
Xiao, Ming, Xiang Gao, Tomás Palacios and Yuhao Zhang. "Leakage and breakdown mechanisms of GaN vertical power FinFETs." Applied Physics Letters 114, issue 16 (April 2019) 163503 © 2019 Author(s)
Version
Author's final manuscript
Abstract
This work studies the leakage and breakdown mechanisms of 1.2 kV GaN vertical power FinFETs with edge termination. Two competing leakage and breakdown mechanisms have been identified. The first mechanism is dominated by the electric field, with the leakage current dominated by the electric field in the drift region and destructive breakdown voltage by the peak electric field at the edge termination. The second leakage and breakdown mechanism is controlled by an energy (or potential) barrier in the fin channel. This energy barrier suffers from the drain-induced barrier lowering (DIBL) effect and is highly dependent on gate/drain biases, fin geometries, and GaN/oxide interface charges. The electrons injected into the drift region due to the DIBL effect further lead to trap-assisted space-charge-limited conduction, which results in a nondestructive early breakdown. The barrier height in the fin channel determines which mechanism is dominant; the same device could show either destructive or nondestructive breakdown at different gate biases. To enable the normally off power switching, it is important to suppress the leakage from the second mechanism and maintain a sufficiently high energy barrier in the fin channel up to high drain voltages. Finally, the key device parameters determining the energy barrier in the fin channel have been identified. The findings in this work provide critical device understanding and design guidelines for GaN vertical power FinFETs and other "junctionless" vertical high-voltage power transistors.
Subjects
Physics and Astronomy (miscellaneous)
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Center for Global Change Science
Massachusetts Institute of Technology. Microsystems Technology Laboratories
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1063/1.5092433
