Polyphase Nonlinear Equalization of Time-Interleaved Analog-to-Digital Converters
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Goodman-2009-Polyphase Nonlinear.pdf
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Author(s) • • • •
Goodman, Joel I.
Miller, Benjamin A.
Herman, Matthew
Raz, Gil
Jackson, Jeffrey
Date Issued
May 2009
Journal
IEEE Journal of Selected Topics in Signal Processing
Publisher
Institute of Electrical and Electronics Engineers
Citation
Goodman, J. et al. “Polyphase Nonlinear Equalization of Time-Interleaved Analog-to-Digital Converters.” Selected Topics in Signal Processing, IEEE Journal of 3.3 (2009): 362-373. © 2009 Institute of Electrical and Electronics Engineers
Version
Final published version
Abstract
As the demand for higher data rates increases, commercial analog-to-digital converters (ADCs) are more commonly being implemented with multiple on-chip converters whose outputs are time-interleaved. The distortion generated by time-interleaved ADCs is now not only a function of the nonlinear behavior of the constituent circuitry, but also mismatches associated with interleaving multiple output streams. To mitigate distortion generated by time-interleaved ADCs, we have developed a polyphase NonLinear EQualizer (pNLEQ) which is capable of simultaneously mitigating distortion generated by both the on-chip circuitry and mismatches due to time interleaving. In this paper, we describe the pNLEQ architecture and present measurements of its performance.
Subjects
time-interleaved analog-to-digital converter (ADC)
polynomial filter
nonlinear equalization
nonlinear compensation
multidimensional filter
mismatch distortions
Volterra
compressed sensing
MIT Department
Lincoln Laboratory
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DOI of Published Version
http://dx.doi.org/10.1109/JSTSP.2009.2020243