Yield-driven iterative robust circuit optimization algorithm
Name
Li-2009-Yield-driven iterative robust circuit optimization algorithm.pdf
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582.34 KB
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Author(s)
Li, Yan
Stojanovic, Vladimir Marko
Date Issued
August 2009
Journal
Proceedings of the 46th ACM/IEEE Design Automation Conference, 2009
Publisher
Institute of Electrical and Electronics Engineers
Citation
Yan Li; Stojanovic, V.; , "Yield-driven iterative robust circuit optimization algorithm," Design Automation Conference, 2009. DAC '09. 46th ACM/IEEE , vol., no., pp.599-604, 26-31 July 2009. Copyright 2009 ACM
Version
Final published version
Abstract
This paper proposes an equation-based multi-scenario iterative robust
optimization methodology for analog/mixed-signal circuits.
We show that due to local circuit performance monotonicity in random
variations constraint maximization can be used to efficiently
find critical constraints and worst-case scenarios of random process
variations and populate them into a multi-scenario optimization.
This algorithm scales gracefully with circuit size and is tested on
both two-stage and fully differential folded-cascode operational amplifiers
with a 90 nm predictive model. The improving yield-trends
are confirmed across process and random variations with Hspice
Monte-Carlo simulations.
Subjects
Algorithms
Robust Circuit Optimization
Variability
Yield
Analog Circuits
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1145/1629911.1630065
