MapTune: Versatile ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning
Author(s)
Liu, Mingju
Robinson, Daniel
Li, Yingjie
Maximilian Kuehn, Johannes
Liang, Rongjian
Ren, Haoxing
Yu, Cunxi
Date Issued
July 11, 2025
Journal
ACM Transactions on Design Automation of Electronic Systems
Publisher
ACM
Citation
Mingju Liu, Daniel Robinson, Yingjie Li, Johannes Maximilian Kuehn, Rongjian Liang, Haoxing Ren, and Cunxi Yu. 2025. MapTune: Versatile ASIC Technology Mapping via Reinforcement Learning Guided Library Tuning. ACM Trans. Des. Autom. Electron. Syst. Just Accepted (July 2025).
Version
Final published version
Abstract
Technology mapping involves mapping logical circuits to a library of cells. Traditionally, the full technology library is used, leading to a large search space and potential overhead. Motivated by randomly sampled technology mapping case studies, we propose a MapTune framework that addresses this challenge by utilizing reinforcement learning to make design-specific choices during cell selection. By learning from the environment, MapTune refines the cell selection process, resulting in a reduced search space and potentially improved mapping quality. The effectiveness of MapTune is evaluated on a wide range of benchmarks, different technology libraries, and various technology mappers. The experimental results demonstrate that MapTune achieves higher mapping accuracy and reduces delay/area across diverse circuit designs, technology libraries, and mappers. The paper also discusses the Pareto-Optimal exploration and confirms the perpetual delay-area trade-off. Conducted on benchmark suites ISCAS 85/89, ITC/ISCAS 99, VTR8.0, and EPFL benchmarks, the post-technology mapping and post-sizing quality-of-results (QoR) have been significantly improved, with average Area-Delay Product (ADP) improvement of 16.56\% among all different exploration settings in MapTune. The improvements consistently remained for four different technologies (7nm, 45nm, 130nm, and 180 nm) with various mappers from both state-of-the-art open-source and commercial synthesis tools.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution
Persistent DSpace Link
DOI of Published Version
http://dx.doi.org/10.1145/3748507
