Low-power amplifier chopper stabilization for a digital-to-analog converter
Name
400009395-MIT.pdf
Description
Full printable version
Size
2.16 MB
Format
Adobe PDF
Checksum (MD5)
26cde44ef49834e53bdc327f64e0cc4a
Author(s)
Jordy, Keith (Keith M.)
Advisor(s)
Joel Dawson.
Date Issued
2008
Publisher
Massachusetts Institute of Technology
Abstract
Modern portable media devices demand low-power and low-noise performance from the internal digital-to-analog converter. CMOS design has allowed for oversampling sigma-delta modulation to achieve these goals. However, noise is typically limited by the kT/C noise in the switched capacitor filter following the digital modulation. These filters also require a large amount of on-chip capacitance. The goal of this project is to design a continuous-time output stage for a DAC. A continuous-time output requires much less capacitance than the SC filter. Chopper stabilization is applied to the amplifier to reduce the low-frequency noise. The challenge of this architecture is maintaining amplifier harmonic performance and transient performance. In simulations, chopper stabilization improved signal-to-noise ratio by 11dB while maintaining system level harmonic distortion performance.
Description
Includes bibliographical references (p. 59).
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2008.
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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