Current limiters based on silicon pillar un-gated FET for field emission application
Name
720986529-MIT.pdf
Description
Full printable version
Size
9.19 MB
Format
Adobe PDF
Checksum (MD5)
81ed3b4ebcd77a960616727975fce1d4
Author(s)
Niu, Ying, M. Eng. Massachusetts Institute of Technology
Advisor(s)
Akintunde Ibitayo Akinwande.
Date Issued
2009
Publisher
Massachusetts Institute of Technology
Abstract
This research investigates the use of vertical silicon ungated field effect transistors (FETs) as current limiters to individuallycontrol emission current in a field emitter and provide a simple solution to three problems that have plagued field emission arrays-emission current uniformity, emission current stability and reliability. The ungated FET is an high aspect ratio silicon pillar individually connected in series with silicon or carbon nanofiber (CNF) emission tip. The transistors were designed as high aspect ratio silicon pillars in order to achieve velocity saturation of carriers and obtain current source-like characteristics. Device and process simulations were initially conducted to solidify the derived analytical model and optimize design parameters. Devices were fabricated and characterized in the Microsystems Technology Laboratory. The main outcome of this study is that individual control of field emitter current is feasible using un-gated FETs based vertical Si pillars.
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.
Cataloged from PDF version of thesis.
Includes bibliographical references (p. 56-58).
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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