Spoked-ring microcavities: enabling seamless integration of nanophotonics in unmodified advanced CMOS microelectronics chips
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Ram_Spoked-ring.pdf
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Author(s)
Wade, Mark T.
Shainline, Jeffrey M.
Orcutt, Jason Scott
Ram, Rajeev J.
Stojanovic, Vladimir
Popovic, Milos A.
Date Issued
March 2014
Journal
Proceedings of SPIE--the International Society for Optical Engineering
Publisher
Society of Photo-Optical Instrumentation Engineers (SPIE)
Citation
Wade, Mark T., Jeffrey M. Shainline, Jason S. Orcutt, Rajeev J. Ram, Vladimir Stojanovic, and Milos A. Popovic. “Spoked-Ring Microcavities: Enabling Seamless Integration of Nanophotonics in Unmodified Advanced CMOS Microelectronics Chips.” Edited by Henning Schröder, Ray T. Chen, and Alexei L. Glebov. Optical Interconnects XIV, 3-5 February 2014, San Francisco, California, United States (March 8, 2014). (Proc. SPIE 8991)
Version
Final published version
Abstract
We present the spoked-ring microcavity, a nanophotonic building block enabling energy-efficient, active photonics in unmodified, advanced CMOS microelectronics processes. The cavity is realized in the IBM 45nm SOI CMOS process – the same process used to make many commercially available microprocessors including the IBM Power7 and Sony Playstation 3 processors. In advanced SOI CMOS processes, no partial etch steps and no vertical junctions are available, which limits the types of optical cavities that can be used for active nanophotonics. To enable efficient active devices with no process modifications, we designed a novel spoked-ring microcavity which is fully compatible with the constraints of the process. As a modulator, the device leverages the sub-100nm lithography resolution of the process to create radially extending p-n junctions, providing high optical fill factor depletion-mode modulation and thereby eliminating the need for a vertical junction. The device is made entirely in the transistor active layer, low-loss crystalline silicon, which eliminates the need for a partial etch commonly used to create ridge cavities. In this work, we present the full optical and electrical design of the cavity including rigorous mode solver and FDTD simulations to design the Qlimiting electrical contacts and the coupling/excitation. We address the layout of active photonics within the mask set of a standard advanced CMOS process and show that high-performance photonic devices can be seamlessly monolithically integrated alongside electronics on the same chip. The present designs enable monolithically integrated optoelectronic transceivers on a single advanced CMOS chip, without requiring any process changes, enabling the penetration of photonics into the microprocessor.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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DOI of Published Version
https://doi.org/10.1117/12.2054788
