An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications
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Author(s)
Banerjee, Utsav
Wright, Andrew D.
Juvekar, Chiraag
Waller, Madeleine(Madeleine G.)
Arvind, Arvind
Chandrakasan, Anantha P
Date Issued
August 2019
Journal
IEEE Journal of Solid-State Circuits
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Banerjee, Utsav et al. "An Energy-Efficient Reconfigurable DTLS Cryptographic Engine for Securing Internet-of-Things Applications." IEEE Journal of Solid-State Circuits 54, 8 (August 2019): 2339 - 2352. © 2019 IEEE
Version
Author's final manuscript
Abstract
This paper presents the first hardware implementation of the datagram transport layer security (DTLS) protocol to enable end-to-end security for the Internet of Things (IoT). A key component of this design is a reconfigurable prime field elliptic curve cryptography (ECC) accelerator that is 238× and 9× more energy-efficient compared to software and state-of-the-art hardware, respectively. Our full hardware implementation of the DTLS 1.3 protocol provides 438× improvement in energy-efficiency over software, along with code size and data memory usage as low as 8 and 3 KB, respectively. The cryptographic accelerators are coupled with an on-chip low-power RISC-V processor to benchmark applications beyond DTLS with up to two orders of magnitude energy savings. The test chip, fabricated in 65-nm CMOS, demonstrates hardware-accelerated DTLS sessions while consuming 44.08 μJ/handshake and 0.89 nJ/byte of the encrypted data at 16 MHz and 0.8 V.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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DOI of Published Version
https://doi.org/10.1109/jssc.2019.2915203
