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NetBlocks: Staging Layouts for High-Performance Custom Host Network Stacks

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Author(s)
Brahmakshatriya, Ajay
•
Rinard, Chris
•
Ghobadi, Manya
•
Amarasinghe, Saman
Date Issued
June 20, 2024
Journal
Proceedings of the ACM on Programming Languages
Publisher
Association for Computing Machinery
Citation
Brahmakshatriya, Ajay, Rinard, Chris, Ghobadi, Manya and Amarasinghe, Saman. 2024. "NetBlocks: Staging Layouts for High-Performance Custom Host Network Stacks." Proceedings of the ACM on Programming Languages, 8 (PLDI).
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Final published version
Abstract
Modern network applications and environments, ranging from data centers and IoT devices to AR/VR headsets and underwater robotics, present diverse requirements that cannot be satisfied by the all or-nothing approach of TCP and UDP protocols. Network researchers and engineers need to create highly tailored protocols targeting individual problem domains. Existing library-based approaches either fall short on the flexibility in features or offer them at a significant performance overhead. To address this challenge, we present NetBlocks, a domain-specific language, and compiler for designing ad-hoc protocols and generating their highly optimized host network stack implementations. NetBlocks DSL input allows users to configure protocols by selecting and customizing features. Unlike other DSL compilers, NetBlocks also allows network researchers to extend the system and add more features easily without any prior compiler knowledge. Our design and implementation employ a high-performance Aspect-Oriented Programming framework written with the staging framework BuildIt. We also introduce a novel Layout Customization Layer that allows "staging packet layouts" alongside the implementation, which is critical for getting the best performance out of the protocol when possible, while allowing the practitioners to maintain compatibility with existing protocol layers where needed. Our evaluations on three applications ranging across deployments in data centers and underwater acoustic networks demonstrate a trade-off between performance (both latency and throughput) and selected features allowing the user to only pay-for what-they-use.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Terms of Use
Creative Commons Attribution
https://creativecommons.org/licenses/by/4.0/
Persistent DSpace Link
https://hdl.handle.net/1721.1/155460
DOI of Published Version
https://doi.org/10.1145/3656396
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