A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices
Name
2018_preprint_wearable_HEVC_decoder.pdf
Description
Accepted version
Size
2.61 MB
Format
Adobe PDF
Checksum (MD5)
53d98da4aa73ecc3892df41b83de32f8
Author(s)
Tikekar, Mehul
Sze, Vivienne
Chandrakasan, Anantha P
Date Issued
2018
Journal
IEEE Journal of Solid-State Circuits
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Version
Author's final manuscript
Abstract
© 1966-2012 IEEE. This paper proposes a fully integrated H.265/high efficiency video coding (HEVC) video decoder that supports real-time video playback within the 50-mW power budget of wearable devices, such as smart watches and virtual reality (VR) headsets. Specifically, this paper focuses on reducing data movement to and from off-chip memory as it dominates energy consumption, consuming 2.8-6 times more energy than processing in most video decoders. Embedded dynamic random access memory (eDRAM) is used for main memory, and several techniques are proposed to reduce the power consumption of the eDRAM itself: 1) lossless compression is used to store reference frames in two times fewer eDRAM macros, reducing refresh power by 33%; 2) eDRAM macros are powered up on-demand to further reduce refresh power by 33%; and 3) syntax elements are distributed to four decoder cores in a partially compressed form to reduce decoupling buffer power by four times. These approaches reduce eDRAM power by two times in a fully integrated H.265/HEVC decoder with the lowest reported system power. The test chip containing 10.5 MB of eDRAM requires no external memory and consumes 24.9-30.6 mW for decoding 1920× 1080 video at 24-50 frames/s.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
Persistent DSpace Link
DOI of Published Version
10.1109/JSSC.2018.2837124
https://doi.org/10.1109/JSSC.2018.2837124
