Procedural layout of a high-speed floating-point arithmetic unit

Name

RLE-TR-508-17684930.pdf

Size

6.28 MB

Format

Adobe PDF

Checksum (MD5)

eaa2db8e91e413d34184954a1a7dd73e

Date Issued

1985

Publisher

Massachusetts Institute of Technology, Research Laboratory of Electronics

Series/Report no.

Technical report (Massachusetts Institute of Technology. Research Laboratory of Electronics) ; 508.

Description

Originally presented as author's thesis (Electrical Engineer --Massachusetts Institute of Technology) 1985.

Bibliography: leaf 116.

MIT Department

Massachusetts Institute of Technology. Research Laboratory of Electronics

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