Fully monolithic cellular buck converter design for 3-D power delivery
Name
Sun-2009-Fully monolithic cellular buck converter design for 3-D power delivery.pdf
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1.02 MB
Format
Adobe PDF
Checksum (MD5)
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Author(s)
Sun, Jian
Giuliano, David Michael
Devarajan, Siddharth
Lu, Jian-Qiang
Chow, T. Paul
Gutmann, Ronald J.
Date Issued
February 2009
Journal
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Publisher
Institute of Electrical and Electronics Engineers
Citation
Jian Sun; Giuliano, D.; Devarajan, S.; Jian-Qiang Lu; Chow, T.P.; Gutmann, R.J.; , "Fully Monolithic Cellular Buck Converter Design for 3-D Power Delivery," Very Large Scale Integration (VLSI) Systems, IEEE Transactions on , vol.17, no.3, pp.447-451, March 2009. © Copyright 2009 IEEE
Version
Final published version
Abstract
A fully monolithic interleaved buck dc-dc point-of-load (PoL) converter has been designed and fabricated in a 0.18-mm SiGe BiCMOS process. Target application of the design is 3-D power delivery for future microprocessors, in which the PoL converter will be vertically integrated with the processor using wafer-level 3-D interconnect technologies. Advantages of 3-D power delivery over conventional discrete voltage regulator modules (VRMs) are discussed. The prototype design, using two interleaved buck converter cells each operating at 200 MHz switching frequency and delivering 500 mA output current, is discussed with a focus on the converter power stage and control loop to highlight the tradeoffs unique to such high-frequency, monolithic designs. Measured steady-state and dynamic responses of the fabricated prototype are presented to demonstrate the ability of such monolithic converters to meet the power delivery requirements of future processors.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1109/TVLSI.2008.2005312
