A Raw processor interface to an 802.11b/g RF front end
Name
62522673-MIT.pdf
Description
Full printable version
Size
4.15 MB
Format
Adobe PDF
Checksum (MD5)
c490da74f782cf7ebba08b3731925428
Author(s)
Walker, Benjamin Philip Eugene Zaks
Advisor(s)
Anant Agarwal.
Date Issued
2004
Publisher
Massachusetts Institute of Technology
Abstract
The Raw microprocessor is a tiled architecture processor designed by the Computer Architecture Group at MIT. Raw was designed in part to be extremely good at performing streaming-type algorithms such as those found in wireless communications processing. This thesis describes the design and implementation of an interface between the Raw microprocessor and a modified 802.11a/b/g wireless access point. Combined with the Raw processor, this interface replaces a custom digital chip in the access point. The interface can be used with the Raw microprocessor to perform communications research, and as a system demonstrating Raw's capabilities. The interface has been built, tested, and functionally qualified.
Description
Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2004.
Includes bibliographical references (p. 95-96).
Subjects
Electrical Engineering and Computer Science.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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