We are experiencing some difficulties with our submission forms, which we are working to resolve. If you have any issues, please contact us at dspace-lib@mit.edu.

A Switch-level Simulation Model for Integrated Logic Circuits

Thumbnail Image
Download
Name

MIT-LCS-TR-259.pdf

Size

8.12 MB

Format

Adobe PDF

Checksum (MD5)

e4e427dcaea4ddfcd42cc57a57159aea

Author(s)
Bryant, Randal Everitt
Advisor(s)
Dennis, Jack B.
Date Issued
March 1981
Series/Report no.
MIT-LCS-TR-259
Abstract
Switch-level simulators model a metal oxide semiconductor (MOS) large scale integrated (LSI) circuits as a network of transistor "switches". They can simulate many aspects of MOS circuits which cannot be expressed in the Boolean logic gate model, such as bidrecttional pass transistors, dynamic storage, and charge sharing.
Persistent DSpace Link
PrivacyPermissionsAccessibilityContact us
Notify us about copyright concerns.