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A Multiprocessor Architecture Using Modular Arithmetic for Very High Precision Computation

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Author(s)
Wu, Henry M.
Date Issued
April 1, 1989
Series/Report no.
AIM-1119
Abstract
We outline a multiprocessor architecture that uses modular arithmetic to implement numerical computation with 900 bits of intermediate precision. A proposed prototype, to be implemented with off-the-shelf parts, will perform high-precision arithmetic as fast as some workstations and mini- computers can perform IEEE double-precision arithmetic. We discuss how the structure of modular arithmetic conveniently maps into a simple, pipelined multiprocessor architecture. We present techniques we developed to overcome a few classical drawbacks of modular arithmetic. Our architecture is suitable to and essential for the study of chaotic dynamical systems.
Subjects
modular arithmetic
computer architecture
multiprocessor
sresidue number system
computer arithmetic
pipelining
chaos
Persistent DSpace Link
http://hdl.handle.net/1721.1/6021
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