MURPHY---A Scalable Multiresolution Framework for Scientific Computing on 3D Block-Structured Collocated Grids
Name
21m141676x.pdf
Description
Published version
Size
2.51 MB
Format
Adobe PDF
Checksum (MD5)
63906f42e2b74bb45842f7b6fcc856e6
Author(s)
Gillis, Thomas
van Rees, Wim M.
Date Issued
September 29, 2022
Journal
SIAM Journal on Scientific Computing
Publisher
Society for Industrial & Applied Mathematics
Citation
Gillis, Thomas and van Rees, Wim M. 2022. "MURPHY---A Scalable Multiresolution Framework for Scientific Computing on 3D Block-Structured Collocated Grids." SIAM Journal on Scientific Computing, 44 (5).
Version
Final published version
Abstract
We present the derivation, implementation, and analysis of a multiresolution adaptive grid framework for numerical simulations on octree-based three-dimensional block-structured collocated grids with distributed computational architectures. Our approach provides a consistent handling of nonlifted and lifted interpolating wavelets of arbitrary order demonstrated using second-, fourth-, and sixth-order wavelets, combined with standard finite-difference-based discretization operators. We first validate that the wavelet family used provides strict and explicit error control when coarsening the grid, and show that lifting wavelets increase the grid compression rate while conserving discrete moments across levels. Further, we demonstrate that high-order PDE discretization schemes combined with sufficiently high-order wavelets retain the expected convergence order even at resolution jumps. We then simulate the advection of a scalar to analyze convergence for the temporal evolution of a PDE. The results shows that our wavelet-based refinement criterion is successful at controlling the overall error while the coarsening criterion is effective at retaining the relevant information on a compressed grid. Our software exploits a block-structured grid data structure for efficient multilevel operations, combined with a parallelization strategy that relies on a one-sided MPI-RMA communication approach with active post-start-complete-wait synchronization. Using performance tests up to 16,384 cores, we demonstrate that this leads to a highly scalable performance. The associated code is available under a BSD-3 license at https://github.com/vanreeslab/murphy.
MIT Department
Massachusetts Institute of Technology. Department of Mechanical Engineering
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Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1137/21m141676x
