Algorithms for scheduling task-based applications onto heterogeneous many-core architectures
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Devadas_Algorithms for.pdf
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Author(s)
Kinsy, Michel A.
Devadas, Srinivas
Date Issued
September 2014
Journal
Proceedings of the 2014 IEEE High Performance Extreme Computing Conference (HPEC)
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Kinsy, Michel A., and Srinivas Devadas. “Algorithms for Scheduling Task-Based Applications onto Heterogeneous Many-Core Architectures.” 2014 IEEE High Performance Extreme Computing Conference (HPEC) (September 2014).
Version
Author's final manuscript
Abstract
In this paper we present an Integer Linear Programming (ILP) formulation and two non-iterative heuristics for scheduling a task-based application onto a heterogeneous many-core architecture. Our ILP formulation is able to handle different application performance targets, e.g., low execution time, low memory miss rate, and different architectural features, e.g., cache sizes. For large size problem where the ILP convergence time may be too long, we propose a simple mapping algorithm which tries to spread tasks onto as many processing units as possible, and a more elaborate heuristic that shows good mapping performance when compared to the ILP formulation. We use two realistic power electronics applications to evaluate our mapping techniques on full RTL many-core systems consisting of eight different types of processor cores.
MIT Department
Massachusetts Institute of Technology. Computer Science and Artificial Intelligence Laboratory
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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Creative Commons Attribution-Noncommercial-Share Alike
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DOI of Published Version
https://doi.org/10.1109/HPEC.2014.7040977
