Circuit level synthesis for delta-sigma converters
Name
42678916-MIT.pdf
Description
Full printable version
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3.82 MB
Format
Adobe PDF
Checksum (MD5)
95eea40597a68dd77edee27bb037376c
Author(s)
Peng, Mark Shane, 1975-
Advisor(s)
Hae-Seung Lee.
Date Issued
1999
Publisher
Massachusetts Institute of Technology
Abstract
Analog circuit design is a relatively complicated art that requires a high degree of erudition in the field. With this in mind, this thesis presents work on an analog circuit synthesis tool to minimize analog circuit design time. Specifically, the author has designed and implemented a discrete-time, one-bit, oversampling delta-sigma analog-to-digital modulator circuit synthesis tool in MATLAB script. With the parameters of center frequency, loop order, oversampling ratio, and minimum capacitor size, a user can utilize the program to generate a semi-optimized transistor level description of the modulator that can subsequently he used in SPICE. Parlaying Richard Schreier's work on a delta-sigma toolbox for MATLAB, the switched capacitor circuit contains robustly generated differential operational amplifiers and comparators. Furthermore, switched capacitors are scaled for minimal kT/C noise while switch sizes are synchronously adjusted to accommodate these values. Results of the SPICE simulations of the generated circuits compare favorably with the behaviorally predicted results.
Description
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.
Includes bibliographical references (p. 65-66).
Subjects
Electrical Engineering and Computer Science
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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