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Maps: A Compiler-Managed Memory System for Software-Exposed Architectures

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Author(s)
Barua, Rajeev
Advisor(s)
Amarasinghe, Saman
Agarwal, Anant
Date Issued
January 2000
Series/Report no.
MIT-LCS-TR-799
Abstract
Microprocessors must exploit both instruction-level parallelism (ILP) and memory parallelism for high performance. Sophisticated techniques for ILP have boosted the ability of modern-day microprocessors to exploit ILP when available. Unfortunately, impro
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