CMOS photonic processor-memory networks
Name
Stojanovic-2010-CMOS photonic processor-memory networks.pdf
Size
796.61 KB
Format
Adobe PDF
Checksum (MD5)
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Author(s)
Stojanovic, Vladimir Marko
Joshi, Ajay J.
Batten, Christopher
Kwon, Yong-Jin
Beamer, Scott
Chen, Sun
Asanovic, Krste
Date Issued
February 2010
Journal
Photonics Society Winter Topicals Meeting Series (WTM), 2010 IEEE
Publisher
Institute of Electrical and Electronics Engineers
Citation
Stojanovic, V. et al. “CMOS photonic processor-memory networks.” Photonics Society Winter Topicals Meeting Series (WTM), 2010 IEEE. 2010. 118-119. © Copyright 2010 IEEE
Version
Final published version
Abstract
This paper presents a monolithically integrated dense WDM photonic network for manycore processors, optimized for loss and power footprint of optical components, which can achieve up to 10x better energy-efficiency and throughput than electrical interconnects.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Article is made available in accordance with the publisher's policy and may be subject to US copyright law. Please refer to the publisher's site for terms of use.
Persistent DSpace Link
DOI of Published Version
https://doi.org/10.1109/PHOTWTM.2010.5421931
