Precomputation-based sequential logic optimization for low power
Name
31279971-MIT.pdf
Description
Full printable version
Size
2.49 MB
Format
Adobe PDF
Checksum (MD5)
9959bc6f136b9a168a976f57b4982c26
Author(s)
Alidina, Mazhar Murtaza
Advisor(s)
Srinivas Devadas.
Date Issued
1994
Publisher
Massachusetts Institute of Technology
Description
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.
Includes bibliographical references (leaves 69-71).
Subjects
Electrical Engineering and Computer Science
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
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