An embedded energy monitoring circuit for a 128kbit SRAM with body-biased sense-amplifiers
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ysinangil_ASSCC_2012_revised.pdf
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1.01 MB
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Checksum (MD5)
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Author(s)
Sinangil, Yildiz
Chandrakasan, Anantha P.
Date Issued
November 2012
Journal
Proceedings of the 2012 IEEE Asian Solid State Circuits Conference (A-SSCC)
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Citation
Sinangil, Yildiz, and Anantha P. Chandrakasan. “An Embedded Energy Monitoring Circuit for a 128kbit SRAM with Body-Biased Sense-Amplifiers.” 2012 IEEE Asian Solid State Circuits Conference (A-SSCC) (November 2012).
Version
Author's final manuscript
Abstract
Embedded energy monitoring of critical system components can be used to enable better power management by capturing run time system conditions such as temperature and application load. In this work, an energy sensing circuit that provides digitally represented absolute energy per operation of a 128kbit SRAM is presented. Designed in a 65nm low-power CMOS process, SRAMs can operate down to 370 mV. Energy sensing circuit consumes 16.7μW during sensing at 1.2V (only 0.28% of SRAM active power at the same voltage). For improved performance, SRAMs utilize body-biased PMOS input strong-arm type sense amplifiers that can achieve 45% tighter input offset distribution for only ~3.5% of total SRAM area overhead.
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Terms of Use
Creative Commons Attribution-Noncommercial-Share Alike
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DOI of Published Version
https://doi.org/10.1109/IPEC.2012.6522629
