An instruction scheduling algorithm for communication-constrained microprocessors
Name
42306043-MIT.pdf
Description
Full printable version
Size
9.21 MB
Format
Adobe PDF
Checksum (MD5)
4300972e4fc519b68c60036ed8d0d5dc
Author(s)
Buehler, Christopher James, 1974-
Advisor(s)
William J. Dally.
Date Issued
1998
Publisher
Massachusetts Institute of Technology
Abstract
This thesis describes a new randomized instruction scheduling algorithm designed for communication-constrained VLIW-style machines. The algorithm was implemented in a retargetable compiler system for testing on a variety a different machine configurations. The algorithm performed acceptably well for machines with full communication, but did not perform up to expectations in the communication-constrained case. Parameter studies were conducted to ascertain the reason for inconsistent results.
Description
Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.
Includes bibliographical references (p. 130-132).
Subjects
Electrical Engineering and Computer Science
MIT Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
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reproduction or distribution in any format is prohibited without written
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