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Cache coherent commutative operations

Author(s)
Horn, Webb H
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Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science.
Advisor
Daniel Sanchez.
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M.I.T. theses are protected by copyright. They may be viewed from this source for any purpose, but reproduction or distribution in any format is prohibited without written permission. See provided URL for inquiries about permission. http://dspace.mit.edu/handle/1721.1/7582
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Abstract
This thesis presents Coup, a technique that reduces the cost of updates in shared memory systems. In particular, it describes a new cache coherence protocol, MEUSI, and evaluates its performance under simulation in zsim. MEUSI extends the MESI protocol to allow data to be cached in a new update-only state, reducing both block-level thrashing and on-chip network traffic under many parallel workflows. Coup permits both single-word and multi-word commutative data operations, which are implemented as x86-64 ISA extensions. To evaluate single-word instructions, this thesis presents a case study of a new reference counting scheme, and for multi-word commutative operations, this thesis describes the design of a commutative memory allocator. Coup and MEUSI confer significant benefits to the reference counting scheme and the memory allocator, both in terms of performance and ease of programming.
Description
Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2015.
 
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
 
Cataloged from student-submitted PDF version of thesis.
 
Includes bibliographical references (pages 51-57).
 
Date issued
2015
URI
http://hdl.handle.net/1721.1/100601
Department
Massachusetts Institute of Technology. Department of Electrical Engineering and Computer Science
Publisher
Massachusetts Institute of Technology
Keywords
Electrical Engineering and Computer Science.

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